A 1.6Gb/s CMOS LVDS Transmitter with a Programmable Pre-Emphasis System
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Date
2014Author
Reyes, Benjamín T
Paulina, German
Tealdi, Lucas
Labat, Emanuel
Sanchez, Raúl
Mandolesi, Pablo S.
Hueda, Mario R.
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A 12 parallel low voltage differential signaling (LVDS) transmitter fabricated in 0.13 μm CMOS is presented. Each LVDS channel can operate over 1.6 Gb/s and includes a programmable pre-emphasis circuit designed to reduce the data-dependent jitter (DDJ) caused by different lengths of PCB traces. Experimental results of the fabricated LVDS confirm the correct operation of the programmable pre-equalization circuit. The power consumption and area per channel is less than 20 mW and 0.084 mm2, respectively.